SIM-406	ADRES register is not getting updated with ADC conversion result after conversion period is over for PIC16F72X Family devices.
SIM-471	[16F72x] POR or BOR does not clear status bit in PCON register for PIC16F72X devices.
SIM-472	Flash read operation through software does not read flash for PIC16F72X devices.
SIM-487	SFR's such as STATUS, INTCON etc cannot be accessed for r/w when current Bank is between 4 to 31 for PIC16F19xx devices.
SIM-503	Prescaler 1:64 is not implemented for Timer2, Timer4 and Timer6 for PIC16F19xx devices.
SIM-504	Timer4 and Timer6 for PIC16F19xx device does not trigger interrupt in simulator.

5.1 Repairs and Enhancements Made in v8.20

SIM-478	UART receiver looses data in loopback mode when ADC module is turned ON for all 16 bit devices.
SIM-462	Writing to CM1CON0 affects both CM1CON0 and CM2CON0 registers for PIC16F526.
SIM-408	Accessing certain registers such as EECON, EEDATA, EEADR, etc,. which are mirrored between bank1 and bank3, does not work for the PIC16F526 device.
SIM-464	RC3 doesn't work as digital input pin for PIC18F14K50.
SIM-459	Simulator corrupts content of register W0 upon interrupt for several PIC24F devices.
SIM-440	H:M:S does not work as a time base in stimulus window.
SIM-412	CCP2 always functions on RC1 regardless of pin configuration set in APFCON register for PIC16LF/F72X devices.

6 Known Problems

The following is a list of known problems. For information on common problems, error messages and limitations, please see Troubleshooting in the online help file for MPLAB SIM (hlpMPLABSIM.chm).

Debug/Release Build Configuration

Building a project for the simulator under Debug mode will cause unrequired resources to be used. This may cause code without proper paging or banking operations not to function in this mode for 8 bit devices.

System Service Requests (SSRs):

26235:	PIC17C44: TABLATL and TABLATH do not get updated in the Watch window.
26495:	Trace window Reset Time Stamp does not reset the timestamp for Simulators. Time stamp currently same as simulator time. Use Reset command from menu.
27065:	Software clock switching is not simulated.
27447:	COSC <2> and NOSC<2> bits of OSCCON register may not correctly reflect the current oscillator selection.
27634:	PIC18F devices: DAW instruction does not work as expected when DC and C are set.
27707:	Simulator (and trace) are incorrectly calculating the number of cycles required by a PSV access for dsPIC30F devices.
28363:	For PIC24F and possibly some PIC18F devices, simulator does not implement the RC coupling delay experienced on real silicon when I/O PORTs are written to followed by an immediate read operation.
28391:	Logic Analyzer is currently only cycle based.
28576	PWM Output override is not implemented for dsPIC33 and dsPIC30F devices in simulator.
28770:	Simulator does not support table writes to the configuration bits; a limitation needs to be added for PIC18 devices.
29088:	Interrupt on the falling edge does not occur on PIC16C781/2.
29518:	Flash configuration word write using table write operation is not implemented for PIC24F devices.
SIM-285:	ISR entry latency for Soft trap do not match silicon for 16-bit simulator.
SIM-363:	Request to access the Device ID via table read instruction in the Simulator for 16 bit devices.
SIM-365:	Programming/Erase of flash word option is not simulated for PIC24F devices
SIM-381:	Code Guard feature for Data memory, EEPROM, Program/Erase of Config fuses and flash not supported in this release'
SIM-399:	RE3 bit of PORTE is always set to 1 for PIC18F26K20 & PIC18F46K20 devices.
SIM-404:	Value of the STKPTR wraps around after the Stack Overflow, even when the configuration bit "Stack Overflow Reset" (STVR=OFF) is disabled for PIC18F1220
SIM-423:	Flash and EEPROM write/Erase operation does not work for many options for PIC24FKA devices
SIM-446:	Simulator causes reset or behaves incorrectly if instruction at 4th cycle lag of stack error trap happens to be stack related instruction for 16 bit devices
SIM-457:	Unexpected behavior when setting/clearing an unmapped peripheral pin from the stimulus (INT1, INT2, TxCK) for dsPIC33FJ PPS Devices.
SIM-465:	Animate sometime crashes MPLAB IDE when logic analyzer window is open.
SIM-473:	[16F72X ] Timer gated mode operations such as single pulse, toggle mode are not implemented in simulator for PIC16F72X and 16F19xx devices.
SIM-474:	[16F72x} Timer1 gated mode operation does not work when gate source is other than T1G input for 16F72X and 16F19xx family devices.
SIM-480:	Input Capture2 to 5 does not respond to input and capture never happens for PIC24F PPS devices having Enhanced capture module.
SIM-486:	Stepping over a MACRO causes MPSIM to hang for PIC12F683.
SIM-501:	Timer5 interrupt does not branch execution to ISR even if T5IF bit is set for dsPIC33FJ128MC802
SIM-514:	Special event trigger of ECCP module does not trigger the ADC in the device family 18F14K50
SIM-518:	Load program flash "write latches" operation will also write program flash for PIC16F19xx
SIM-531:	Analog comparator inputs and outputs are mapped to incorrect port pin in simulator for PIC16F19xx devices
SIM-539:	PWM auto shut down feature is not implemented for PIC16F19xx devices
SIM32-67:	Attempt to read from the configuration memory location generates a trap.